Interconnecting substrate and semiconductor device
US7745736B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 30, 2006 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | May 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0384
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnecting substrate is provided with a base insulating film having a sunken section in a bottom surface thereof, a first interconnection provided in the sunken section, a via hole formed in the base insulating film, and a second interconnection which is connected to the first interconnection via a conductor within the via hole and is formed on a top surface of the base insulating film, wherein the interconnecting substrate includes a first interconnection pattern formed of the first interconnection which includes at least a linear pattern which extends along a second direction orthogonal to a first direction, and a warpage-controlling pattern which is provided in the sunken section in the bottom surface of the base insulating film and is formed in such a manner as to suppress a warpage of the interconnecting substrate toward a bottom side on both sides of the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.