PRAM and method of firing memory cells
US7746688B2 · kind B2 · utility
12Cited by
2References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2007 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Jun 13, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A PRAM includes a memory cell array of phase change memory cells, and a write circuit receiving an externally provided first voltage and supplying a write pulse for writing data to the memory cells in a normal operation mode. The write circuit also receives an externally provided second voltage higher than the first voltage and supplies a firing pulse to at least one firing-failed phase change memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.