Acquiring instruction addresses associated with performance monitoring events
US7747844B2 · kind B2 · utility
4Cited by
8References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2005 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Apr 27, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/86
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methodologies, media, and other embodiments associated with acquiring instruction addresses associated with performance monitoring events are described. One exemplary system embodiment includes logic for recording instruction and state data associated with events countable by performance monitoring logic associated with a pipelined processor. The exemplary system embodiment may also include logic for traversing the instruction and state data on a cycle count basis. The exemplary system may also include logic for traversing the instruction and state data on a retirement count basis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.