Semiconductor interconnection structures and capacitors including poly-SiGe layers and metal contact plugs
US7750385B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2007 |
| Grant date | Jul 6, 2010 |
| Priority date | — |
| Expiry date | Aug 21, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a lower electrode of a capacitor, a dielectric layer disposed on the lower electrode, and an upper electrode of the capacitor disposed on the dielectric layer. The upper electrode includes a doped poly-Si1-xGex layer. An interlayer insulating layer is disposed on the doped poly-Si1-xGex layer and has a contact hole partially exposing the doped poly-Si1-xGex layer. A metal contact plug is in the contact hole and an interconnection layer is disposed on the interlayer insulating layer and connected to the metal contact plug. Related interconnection structures and fabrication methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.