Integrated circuit structure incorporating an inductor, a conductive sheet and a protection circuit
US7750408B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2007 |
| Grant date | Jul 6, 2010 |
| Priority date | — |
| Expiry date | Jun 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are embodiments of a circuit (e.g., an electrostatic discharge (ESD) circuit), a design methodology and a design system. In the circuit, an ESD device is wired to a first metal level (e.g., M1). An inductor is formed in a second metal level (e.g., M5) above the first metal level and is aligned over and electrically connected in parallel to the ESD device by a single vertical via stack. The inductor is configured to nullify, for a given application frequency, the capacitance value of the ESD device. The quality factor of the inductor is optimized by providing, on a third metal level (e.g., M3) between the second metal level and the first metal level, a shield to minimize inductive coupling. An opening in the shield allows the via stack to pass through, trading off Q factor reduction for size-scaling and ESD robustness improvements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.