Memory device with negative thresholds
US7751240B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 24, 2008 |
| Grant date | Jul 6, 2010 |
| Priority date | — |
| Expiry date | Jun 3, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for data storage in a memory that includes a plurality of analog memory cells includes storing data in the memory by writing first storage values to the cells. One or more read reference levels are defined for reading the cells, such that at least one of the read reference levels is negative. After storing the data, second storage values are read from the cells using the read reference levels, so as to reconstruct the stored data. In another disclosed method, data is stored in the memory by mapping the data to first storage values selected from a set of the nominal storage values, and writing the first storage values to the cells. The set of nominal storage values is defined such that at least one of the nominal storage values is negative.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.