System and method for using resource pools and instruction pools for processor design verification and validation
US7752499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2007 |
| Grant date | Jul 6, 2010 |
| Priority date | — |
| Expiry date | Dec 22, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for using resource pools and instruction pools for processor design verification and validation is presented. A test case generator organizes processor resources into resource pools using a resource pool mask. Next, the test case generator separates instructions into instruction pools based upon the resources that each instruction requires. The test case generator then creates a test case using one or more sub test cases by assigning a resource pool to each sub test case, identifying instruction pools that correspond the assigned test case, and building each sub test case using instructions included in the identified instruction pools.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.