Integrated device for simplified parallel testing, test board for testing a plurality of integrated devices, and test system and tester unit
US7752510B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2007 |
| Grant date | Jul 6, 2010 |
| Priority date | — |
| Expiry date | Nov 19, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31935
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated device comprises a functional circuit, a test circuit for testing the functional circuit and for providing an error data item and a register element for storing the error data item and for outputting the error data item at an error data output of the integrated device responsive to an output signal. The register element is connected to a data input of the integrated device in order to accept a data item, which is applied to the data input, responsive to the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.