Systems, methods and apparatus for reduction of field-effect transistor leakage in a digital X-ray detector
US7755059B2 · kind B2 · utility
7Cited by
8References
20Claims
0Family size
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Key dates
| Filing date | Nov 4, 2008 |
| Grant date | Jul 13, 2010 |
| Priority date | — |
| Expiry date | Feb 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/62
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods and apparatus are provided through which in some implementations field-effect-transistor (FET) leakage from a pixel array panel of a digital X-ray detector is reduced by acquiring an image and an offset image from the pixel array panel of the digital X-ray detector while a negative voltage of the pixel array panel is at a higher level than a negative voltage of a threshold state of the pixel array panel of the digital X-ray detector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.