Semiconductor integrated circuit capable of overcoming clock signal jitter
US7755410B2 · kind B2 · utility
7Cited by
12References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2008 |
| Grant date | Jul 13, 2010 |
| Priority date | — |
| Expiry date | Dec 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/156
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes a voltage supplying unit that supplies a first regulated voltage and a second regulated voltage by using a first reference voltage and a second reference voltage, respectively, and a clock buffer unit that supplies an output clock clocking within a range of the first regulated voltage and the second regulated voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.