Patent · US Active

Memory agent with error hardware

US7756053B2 · kind B2 · utility

94Cited by

5References

9Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Tessil Thomas · Bengaluru, IN
Henk G. Neefs · Palo Alto, US
Ramesh S · Bengaluru, IN

Key dates

Filing date	Jun 30, 2006
Grant date	Jul 13, 2010
Priority date	—
Expiry date	May 13, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/0793
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory agent that communicates with another memory agent over links may include error hardware to monitor errors in the links. In some embodiments, the error hardware may include logic to classify the errors into different severity levels, control corrective action based on the severity level of errors, and/or perform various levels of reset based on the severity level of errors. Other embodiments are disclosed and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.