Memory command and address conversion between an XDR interface and a double data rate interface
US7757040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2007 |
| Grant date | Jul 13, 2010 |
| Priority date | — |
| Expiry date | Aug 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0292
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A command translation method, apparatus and system are provided for interfacing a processor and a memory. The processor initiates a memory system command in an extreme data rate (XDR) command format which is automatically converted by the command translation method, apparatus and system into a memory system command in a double data rate (DDR) format for forwarding to the memory. Associated with converting the memory system command to the DDR command format is controlling timing of one or more signals presented to the memory interface, the one or more signals being associated with processing the memory system command in the DDR command format. The processor has associated therewith an XDR memory interface controller which adjusts one or more timing parameters of the memory system command in the XDR command format so that DDR timing requirements for the memory system command in the DDR command format are met.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.