Method for manufacturing semiconductor storage device comprising a slow cooling step
US7763500B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2006 |
| Grant date | Jul 27, 2010 |
| Priority date | — |
| Expiry date | Jun 3, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/712
Abstract
First, a base structure provided with the main parts of a memory cell is prepared, and a lower electrode comprising a polycrystalline silicon film is thereafter formed on the base structure. Next, the surface of the lower electrode is thermally nitrided at a predetermined temperature to form a silicon nitride film. In the thermal nitridation of the lower electrode, the temperature is increased to a predetermined nitriding temperature, after which the temperature is reduced at a rate that is more gradual than usual. Aluminum oxide (Al2O3) or another metal oxide dielectric film is thereafter formed as the capacitive insulating film on the lower electrode, and an upper electrode is formed on the capacitive insulating film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.