Relocatable circuit implemented in a programmable logic device
US7765512B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2008 |
| Grant date | Jul 27, 2010 |
| Priority date | — |
| Expiry date | Feb 14, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit is implemented using a programmable logic device (PLD) that includes an array of programmable logic and routing resources. The circuit includes a processor, a configuration port, a relocatable circuit, and an interface circuit. The processor accesses an address space using read and write transactions issued on an interface bus. The programmable logic and interconnect resources are configurable via the configuration port. The relocatable circuit is implemented in a selected region within the array by configuring the programmable logic and interconnect resources in the selected region with configuration data via the configuration port. The interface circuit translates the transactions accessing a portion of the address space assigned to the relocatable circuit into a fixed address space of the relocatable circuit. The configuration data for implementing the relocatable circuit is independent of the portion of the address space assigned to the relocatable circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.