Dual salicide integration for salicide through trench contacts and structures formed thereby
US7768074B2 · kind B2 · utility
11Cited by
1References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2008 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | Dec 31, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and associated structures of forming a microelectronic device are described. Those methods may include forming an NMOS silicide on an NMOS source/drain contact area, forming a first contact metal on the NMOS silicide, polishing the first contact metal to expose a top surface of a PMOS source/drain region, and forming a PMOS silicide on the PMOS source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.