Inventor · Dresden, DE

Bernhard Sell

87Patents
10h-index
102Co-inventors
81Inventor score

Filing activity: Oct 2, 2000 → Feb 16, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US7041568B2 Method for the production of a self-adjusted structure on a semiconductor wafer Electricity 197 Expired
US6835417B2 Method and device for depositing thin layers via ALD/CVD processes in combination with rapid thermal processes Chemistry; Metallurgy 103 Expired
US7335959B2 Device with stepped source/drain region profile Electricity 75 Expired
US7732285B2 Semiconductor device having self-aligned epitaxial source and drain extensions Electricity 40 Active
US7663192B2 CMOS device and method of manufacturing same Electricity 23 Active
US8941214B2 Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width Electricity 17 Active
US6620724B1 Low resistivity deep trench fill for DRAM and EDRAM applications Electricity 16 Expired
US7943469B2 Multi-component strain-inducing semiconductor regions Electricity 16 Active
US7768074B2 Dual salicide integration for salicide through trench contacts and structures formed thereby Electricity 11 Active
US7829943B2 Low-k isolation spacers for conductive regions Emerging Cross-Sectional Technologies 10 Active
US6633061B2 SOI substrate, a semiconductor circuit formed in a SOI substrate, and an associated production method Electricity 10 Expired
US7687364B2 Low-k isolation spacers for conductive regions Emerging Cross-Sectional Technologies 9 Active
US6800898B2 Integrated circuit configuration and method of fabricating a dram structure with buried bit lines or trench capacitors Electricity 9 Expired
US8803245B2 Method of forming stacked trench contacts and structures formed thereby Electricity 8 Active
US6504200B2 DRAM cell configuration and fabrication method Electricity 6 Expired
US11239238B2 Thin film transistor based memory cells on both sides of a layer of logic devices Electricity 6 Active
US6627940B1 Memory cell arrangement Electricity 6 Expired
US9559060B2 Method of forming stacked trench contacts and structures formed thereby Electricity 5 Active
US9922930B2 Method of forming stacked trench contacts and structures formed thereby Electricity 5 Active
US9437546B2 Method of forming stacked trench contacts and structures formed thereby Electricity 5 Active
US9252267B2 Method of forming stacked trench contacts and structures formed thereby Electricity 5 Active
US6674113B2 Trench capacitor and method for manufacturing the same Electricity 4 Expired
US6600680B2 Circuit configuration and method for determining a time constant of a storage capacitor of a memory cell in a semiconductor memory Physics 4 Expired
US10297549B2 Method of forming stacked trench contacts and structures formed thereby Electricity 4 Active
US6525363B1 Integrated circuit configuration with at least one capacitor and method for producing the same Electricity 4 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.