Stacked dual-die packages, methods of making, and systems incorporating said packages
US7768123B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2007 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | May 21, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die package. It includes a substrate having a first surface and a second surface, a first semiconductor die having its front surface facing the first surface of the substrate, a conductive adhesive disposed between the first semiconductor die and the first surface of the substrate, and a second semiconductor die located on the first semiconductor die. The front surface of second semiconductor die faces away from the first semiconductor die, and the back surface faces toward the first semiconductor die. A plurality of conductive structures electrically couple regions at the front surface of the second semiconductor die to conductive regions at the first surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.