Multiplexor with leakage power regulator
US7768315B2 · kind B2 · utility
4Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2007 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | Dec 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0016
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for a multiplexer includes a pair of NAND gates with outputs coupled to an OAI gate constructed from a complementary circuit formed from solid state devices. A current flow controller formed from solid state devices is coupled to one of the NAND gates. When activated the controller inhibits the flow of current through the NAND gate and a portion of the OAI gate to which the controller is connected. As a consequence, leakage power is not consumed within the multiplexer. Several of the applications in which the circuit is used are also demonstrated in the specification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.