Method for fabricating graphene transistors on a silicon or SOI substrate
US7772059B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2008 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Apr 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/882
Abstract
A method of fabricating graphene transistors, comprising providing an SOI substrate, performing an optional threshold implant on the SOI substrate, forming an upper silicon layer mesa island, carbonizing the silicon layer into SiC utilizing a gaseous source, converting the SiC into graphene, forming source/drain regions on opposite longitudinal ends of the graphene, forming gate oxide between the source/drain regions on the graphene, forming gate material over the gate oxide, creating a transistor edge, depositing dielectric onto the transistor edge and performing back end processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.