Semiconductor device including single crystal silicon layer
US7772711B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2006 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Mar 28, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
Abstract
A semiconductor device including a substrate, a P-MOS single crystal TFT formed on the substrate, and an N-MOS single crystal TFT formed on the P-MOS single crystal TFT. The source region of the P-MOS single crystal TFT and the source region of the N-MOS single crystal TFT may be connected to each other. The P-MOS single crystal TFT and the N-MOS single crystal TFT may share a common gate. Also, the P-MOS single crystal TFT may include a single crystal silicon layer with a crystal plane of (100) and a crystal direction of <100>. The N-MOS single crystal TFT may include a single crystal silicon layer having the same crystal direction as the single crystal silicon layer of the P-MOS single crystal TFT and having a tensile stress greater than the single crystal silicon layer of the P-MOS single crystal TFT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.