Processing bypass register file system and method
US7774583B1 · kind B1 · utility
6Cited by
31References
19Claims
0Family size
Inventors
Key dates
| Filing date | Sep 29, 2006 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Aug 16, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing bypass register file system and method are disclosed. In one embodiment a processing bypass register file includes a rotating head pointer, and a plurality of write ports, storage cells and read ports. The write ports receive processing result information. The head pointer identifies which entries are written by the write ports. The plurality of cells store the processing result information. The read ports forward results to the processing data path, and to an architectural register file for retirement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.