Integrated circuit netlist migration
US7774735B1 · kind B1 · utility
235Cited by
2References
21Claims
0Family size
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Inventor
Key dates
| Filing date | Mar 7, 2007 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | May 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for migrating a netlist from one set of library cells to a new set of library cells with minimal time and effort and without loss of information within an ASCI environment. This methodology ensures that during translation logic equivalence and scan configurations are maintained in the new technology libraries. Additionally, a complete migration of the constraints from the original netlist to the new netlist is also performed. Designer engineers no longer have to start from RTL and execute a complete resynthesis to translate an original design from one technology library to a new technology library.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.