Inventor · San Jose, CA, US

Ankush Sood

6Patents
5h-index
7Co-inventors
48Inventor score

Filing activity: Mar 7, 2007 → Mar 15, 2013

Most-cited inventions

PatentTitleAreaCited byStatus
US7774735B1 Integrated circuit netlist migration Physics 235 Active
US9135375B1 Methods for construction and optimization of a clock tree plan for reduced power consumption Physics 33 Active
US8782591B1 Physically aware logic synthesis of integrated circuit designs Physics 17 Active
US8826211B1 Graphical user interface for physically aware clock tree planning Physics 14 Active
US9411912B1 Clock topology planning for reduced power consumption Physics 11 Active
US9280614B1 Methods, systems, and apparatus for clock topology planning with reduced power consumption Physics 4 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.