Semiconductor device having a gate contact structure capable of reducing interfacial resistance and method of forming the same
US7776687B2 · kind B2 · utility
5Cited by
2References
21Claims
0Family size
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Key dates
| Filing date | May 3, 2007 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Aug 6, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/683
Abstract
A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon layer, and a contact plug directly contacting the polycrystalline silicon layer through the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.