Method of forming semiconductor devices containing metal cap layers
US7776743B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Aug 24, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/0812
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of methods for improving electrical leakage performance and minimizing electromigration in semiconductor devices containing metal cap layers are generally described herein. According to one embodiment, a method of forming a semiconductor device includes planarizing a top surface of a workpiece to form a substantially planar surface with conductive paths and dielectric regions, forming metal cap layers on the conductive paths, and exposing the top surface of the workpiece to a dopant source from a gas cluster ion beam (GCIB) to form doped metal cap layers on the conductive paths and doped dielectric layers on the dielectric regions. According to some embodiments the metal cap layers and the doped metal cap layers contain a noble metal selected from Pt, Au, Ru, Rh, Ir, and Pd.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.