Minimum pulse width for pulse width modulation control
US7777587B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Feb 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/156
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The rising edge of a pulse width modulated output signal occurs after an input ramp signal starts to rise. The ramp signal starts to rise after the rising edge of a periodic set signal and before the falling edge of a periodic set signal. A feedback control signal intersects a substantially linear region of the ramp signal to generate a reset signal using a PWM comparator. The periodic set signal and reset signal are input to a latching circuit to generate the pulse width modulated output signal. The minimum pulse width can approach zero while having adequate overdrive to the PWM comparator. Having the rising edge of the reset signal rise before the falling edge of the set signal can allow a zero percent duty cycle without the need for a ramp offset voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.