System and method for implementing a hardware-supported thread assist under load lookahead mechanism for a microprocessor
US7779234B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2007 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Oct 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/383
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention includes a system and method for implementing a hardware-supported thread assist under load lookahead mechanism for a microprocessor. According to an embodiment of the present invention, hardware thread-assist mode can be activated when one thread of the microprocessor is in a sleep mode. When load lookahead mode is activated, the fixed point unit copies the content of one or more architected facilities from an active thread to corresponding architected facilities in the first inactive thread. The load-store unit performs at least one speculative load in load lookahead mode and writes the results of the at least one speculative load to a duplicated architected facility in the first inactive thread.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.