Method for fabricating a multilayer wiring board, multilayer wiring board, and electronic device using the same
US7780836B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 10, 2006 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Apr 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0733
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
On both surfaces of an electric insulating material 1, a surface conductive layer 2A and a back surface conductive layer 2B are formed by transcription. Further, a via hole 5 penetrating through the surface conductive layer 2A and the electric insulating material 1 is provided. After forming a photosensitive plating resist pattern 14, the via hole 5 is filled with a copper plating filler 15, and the surface wiring layer 9A and the back surface wiring layer 9B are formed. Thereafter, the photosensitive plating resist pattern 14 as well as the surface conductive layer 2A and the back surface conductive layer 2B provided under the photosensitive plating resist pattern 14 are removed to fabricate a double-sided wiring board 11.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.