Robust ESD LDMOS device
US7781834B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2007 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Jul 3, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
Abstract
A semiconductor device includes a gate electrode over a semiconductor substrate, wherein the gate electrode has a gate width direction; a source/drain region in the semiconductor substrate and adjacent the gate electrode, wherein the source/drain region has a first width in a direction parallel to the gate width direction; and a bulk pick-up region in the semiconductor substrate and abutting the source/drain region. The bulk pick-up region and the source/drain region have opposite conductivity types. The bulk pick-up region has a second width in the width direction, and wherein the second width is substantially less than the first width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.