Device patterned with sub-lithographic features with variable widths
US7781847B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 21, 2008 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Oct 30, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/887
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of processing a substrate of a device comprises the as following steps. Form a cap layer over the substrate. Form a dummy layer over the cap layer, the cap layer having a top surface. Etch the dummy layer forming patterned dummy elements of variable widths and exposing sidewalls of the dummy elements and portions of the top surface of the cap layer aside from the dummy elements. Deposit a spacer layer over the device covering the patterned dummy elements and exposed surfaces of the cap layer. Etch back the spacer layer forming sidewall spacers aside from the sidewalls of the patterned dummy elements spaced above a minimum spacing and forming super-wide spacers between sidewalls of the patterned dummy elements spaced less than the minimum spacing. Strip the patterned dummy elements. Expose portions of the substrate aside from the sidewall spacers. Pattern exposed portions of the substrate by etching into the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.