Parallel multi-rate circuit simulation
US7783465B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 18, 2006 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Sep 20, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method for solving parallel equations in a circuit simulation is described. The method includes partitioning a circuit Jacobian matrix into loosely coupled partitions, reordering the voltage vector and the matrix according to the partitions, and splitting the Jacobian matrix into two matrices M and N, where M is a matrix suitable for parallel processing and N is a coupling matrix. M and N are then preconditioned to form M−1Jx=(I+M−1N)x=M−1r and the Jacobian matrix J is solved using an iterative solving method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.