Patent · US Active

Data bus width converter

US7783826B2 · kind B2 · utility

1Cited by

5References

17Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Andreas Taeuber · Unterschleißheim, DE
Detlev Richter · Unterhaching, DE
Luca De Ambroggi · Dresden, DE
Rainer Spielberg · Tauberbischofsheim, DE

Key dates

Filing date	Sep 28, 2006
Grant date	Aug 24, 2010
Priority date	—
Expiry date	Jul 7, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/4239
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In one embodiment of the invention, a method of operating a memory system is provided, including concurrently reading data from a plurality of memories of the memory system and outputting the data from the memory system at an output channel capacity of an I/O port of the memory system by converting a data bus width of data read from at least some of the plurality of memories to a data bus width of the I/O port.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.