Method and apparatus for providing mask in semiconductor processing
US7785753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2006 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Jan 16, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/3342
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for processing a two layer mask for use in fabrication of semiconductor devices whereby the critical dimension (CD) of a semiconductor device being fabricated with the mask can be controlled. After forming a carbon mask layer and a silicon containing photoresist layer on the carbon mask, a two-step process forms openings in the carbon mask layer, as required for subsequent device fabrication. The structure is placed in a plasma processing chamber, and an oxygen plasma is employed to partially etch the carbon layer. The oxygen plasma reacts with silicon in the photoresist to form a hard silicon oxide layer on the surface of the photoresist. A hydrogen plasma is then employed to complete the etch through the carbon layer with a reduced critical dimension. Damage to the silicon containing photoresist layer is kept to a minimum during the plasma etch process by limiting the low frequency RF power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.