Method for manufacturing semiconductor device to form a via hole
US7786005B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2006 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Nov 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76814
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An increase of the via resistance resulted due to the presence of the altered layer that has been formed and grown after the formation of the via hole can be effectively prevented, thereby providing an improved reliability of the semiconductor device. A method includes: forming a TiN film on the semiconductor substrate; forming an interlayer insulating film on a surface of the TiN film; forming a resist film on a surface of the interlayer insulating film; etching the semiconductor substrate having the resist film formed thereon to form an opening, thereby partially exposing the TiN film; plasma-processing the exposed portion of the TiN film to remove an altered layer formed in the exposed portion of the TiN film; and stripping the resist film via a high temperature-plasma processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.