Symmetrical bi-directional semiconductor ESD protection device
US7786507B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2009 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Jan 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/713
Abstract
A 2-terminal (i.e., anode, cathode) symmetrical bi-directional semiconductor electrostatic discharge (ESD) protection device is disclosed. The symmetrical bi-directional semiconductor ESD protection device design comprises a first and second shallow wells symmetrically spaced apart from a central floating well. Respective shallow wells comprise a first and second highly doped contact implant with opposite doping types (e.g., n-type, p-type). One or more field plates, connected to the central floating well, extend laterally outward from above the central well. The device can be used as an ESD protection device at a bi-directional I/O (e.g., in parallel with a symmetrical MOS to be protected). Upon an ESD event at an input node comprising the first and second shallow wells, a coupled npn-pnp bipolar component comprising the center well, the first and second shallow wells, and the first and second contact implants, is triggered, thereby shunting current from the first to the second shallow well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.