Inventor · Plano, TX, US

Pinghai Hao

47Patents
7h-index
29Co-inventors
69Inventor score

Filing activity: Mar 3, 2003 → Jul 24, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7786507B2 Symmetrical bi-directional semiconductor ESD protection device Electricity 22 Active
US7235451B2 Drain extended MOS devices with self-aligned floating region and fabrication methods therefor Electricity 17 Expired
US7968936B2 Quasi-vertical gated NPN-PNP ESD protection device Electricity 15 Active
US7598547B2 Low noise vertical variable gate control voltage JFET device in a BiCMOS process and methods to build this device Electricity 14 Active
US6861303B2 JFET structure for integrated circuit and fabrication method Physics 13 Expired
US7018880B2 Method for manufacturing a MOS transistor having reduced 1/f noise Electricity 11 Expired
US7005354B2 Depletion drain-extended MOS transistors and methods for making the same Electricity 10 Expired
US7939863B2 Area efficient 3D integration of low noise JFET and MOS in linear bipolar CMOS process Electricity 5 Active
US7208364B2 Methods of fabricating high voltage devices Electricity 5 Expired
US7244651B2 Fabrication of an OTP-EPROM having reduced leakage current Electricity 4 Expired
US9076760B2 JFET having width defined by trench isolation Physics 3 Active
US6794700B1 Capacitor having a dielectric layer including a group 17 element Electricity 3 Expired
US8530296B2 High voltage transistor using diluted drain Electricity 3 Active
US7268394B2 JFET structure for integrated circuit and fabrication method Physics 3 Expired
US7164160B2 Integrated circuit device with a vertical JFET Electricity 2 Expired
US7989853B2 Integration of high voltage JFET in linear bipolar CMOS process Electricity 2 Active
US7307309B2 EEPROM with etched tunneling window Electricity 2 Expired
US8878283B2 Quasi-vertical gated NPN-PNP ESD protection device Electricity 2 Active
US7670888B2 Low noise JFET Electricity 2 Active
US7745274B2 Gate self aligned low noise JFET Electricity 2 Active
US7045418B2 Semiconductor device including a dielectric layer having a gettering material located therein and a method of manufacture therefor Emerging Cross-Sectional Technologies 1 Expired
US10134596B1 Recessed solid state apparatuses Electricity 1 Active
US9741718B2 High voltage CMOS with triple gate oxide Electricity 1 Active
US11067620B2 HEMT wafer probe current collapse screening Physics 1 Active
US9305688B2 Single photomask high precision thin film resistor Emerging Cross-Sectional Technologies 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.