Patent · US Active

QFN Semiconductor package

US7786557B2 · kind B2 · utility

29Cited by
13References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 22, 2009
Grant dateAug 31, 2010
Priority date
Expiry dateFeb 22, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/30107
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A quad flat non-lead (QFN) semiconductor package includes a die attach pad having a recessed area; a semiconductor die mounted inside the recessed area of the die attach pad; at least one row of inner terminal leads disposed adjacent to the die attach pad; first wires bonding respective said inner terminal leads to the semiconductor die; at least one row of extended, outer terminal leads disposed along periphery of the QFN semiconductor package; at least one row of intermediary terminals disposed between the inner terminal leads and the extended, outer terminal leads; second wires bonding respective the intermediary terminals to the semiconductor die; and third wires bonding respective the intermediary terminals to the extended, outer terminal leads.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.