MEMS package structure
US7786560B2 · kind B2 · utility
5Cited by
1References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 19, 2008 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Nov 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16235
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A package structure including a chip, a lid, a substrate, a plurality of wires, an encapsulant, and a moisture resistive layer is provided. The chip has an active area where at least one MEMS device is disposed. The lid is covered on the chip, and the substrate is used to carry the chip and the lid. The plurality of wires is electrically connected between the substrate and the chip. The encapsulant is sealed around the lid and exposes an upper surface of the lid. The moisture resistive layer is covered on the encapsulant to enhance the airtightness and the moisture resistance of the encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.