Lithography verification using guard bands
US7788627B2 · kind B2 · utility
4Cited by
53References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2006 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Jun 15, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for verifying a lithographic process is described. During the method, a set of guard bands are defined around a target pattern that is to be printed on a semiconductor die using a photo-mask in the lithographic process. An estimated pattern is calculated using a model of the lithographic process. This model of the lithographic process includes a mask pattern corresponding to the photo-mask and a model of an optical path. Then, whether or not positions of differences between the estimated pattern and the target pattern exceeded one or more guard bands in the set of guard bands is determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.