Treatment of the working layer of a multilayer structure
US7790048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2006 |
| Grant date | Sep 7, 2010 |
| Priority date | — |
| Expiry date | May 6, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for forming a plurality of electrically conductive islands in a working layer of a multilayer structure made from semiconductor materials, with the structure including an electrically insulating layer located beneath the working layer. This method includes the steps of selectively masking certain regions of the working layer in order to define several islands therein, with each region masked from the working layer corresponding to a respective island, and then wet chemical etching of the masked working layer to form a plurality of working layer islands each surrounded by the electrically insulating layer. The invention also proposes the application of such a method to the characterization of the electrical properties of a structure, and an associated device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.