Device structures for a metal-oxide-semiconductor field effect transistor and methods of fabricating such device structures
US7790543B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2008 |
| Grant date | Sep 7, 2010 |
| Priority date | — |
| Expiry date | Oct 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
Device structures for a metal-oxide-semiconductor field effect transistor (MOSFET) that is suitable for operation at relatively high voltages and methods of forming same. The MOSFET, which is formed using a semiconductor-on-insulator (SOI) substrate, includes a channel in a semiconductor body that is self-aligned with a gate electrode. The gate electrode and semiconductor body, which are both formed from the monocrystalline SOI layer of the SOI substrate, are separated by a gap that is filled by a gate dielectric layer. The gate dielectric layer may be composed of thermal oxide layers grown on adjacent sidewalls of the semiconductor body and gate electrode, in combination with an optional deposited dielectric material that fills the remaining gap between the thermal oxide layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.