Methods and apparatus for calibrating output voltage levels associated with current-integrating summing amplifier
US7792185B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2007 |
| Grant date | Sep 7, 2010 |
| Priority date | — |
| Expiry date | May 22, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are disclosed for calibrating summing amplifiers based on current integration. For example, apparatus for calibrating output voltage levels of a current-integrating summing amplifier includes the following components. A duplicate integrator circuit is provided, wherein the duplicate integrator circuit replicates an integrator circuit of the current-integrating summing amplifier. A comparing circuit, coupled to the duplicate integrator circuit, is provided for comparing at least one output voltage level generated by the duplicate integrator circuit with a reference voltage level. A feedback loop circuit, coupled to the comparing circuit and the duplicate integrator circuit, is provided for adjusting at least one bias signal of the duplicate integrator circuit so that the output voltage level generated by the duplicate integrator circuit matches the reference voltage level, wherein the bias signal is applied to the integrator circuit of the current-integrating summing amplifier thereby calibrating output signal components due to multiple input signals of the current-integrating summing amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.