Semiconductor package for fine pitch miniaturization and manufacturing method thereof
US7795071B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2007 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Sep 14, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01079
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package and a manufacturing method thereof are provided. The package element has a first insulating layer, and a plurality of holes are disposed on the first surface of the first insulating layer. Besides, a plurality of package traces are embedded in the insulating layer and connected to the other end of the holes. The holes function as a positioning setting for connecting the solder balls to the package traces, such that the signal of the semiconductor chip is connected to the package trace via conductor of the chip, and further transmitted externally via solder ball. The elastic modulus of the material of the first insulating layer is preferably larger than 1.0 GPa.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.