Semiconductor device manufactured by removing sidewalls during replacement gate integration scheme
US7795097B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 20, 2007 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Jan 21, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One aspect of the invention provides a semiconductor device that includes gate electrodes comprising a metal or metal alloy located over a semiconductor substrate, wherein the gate electrodes are free of spacer sidewalls. The device further includes source/drains having source/drain extensions associated therewith, located in the semiconductor substrate and adjacent each of the gate electrodes. A first pre-metal dielectric layer is located on the sidewalls of the gate electrodes and over the source/drains, and a second pre-metal dielectric layer is located on the first pre-metal dielectric layer. Contact plugs extend through the first and second pre-metal dielectric layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.