Self-aligned cross-point memory fabrication
US7795132B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2008 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Jul 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/10
Abstract
Fabricating a cross-point memory structure using two lithography steps with a top conductor and connector or memory element and a bottom conductor orthogonal to the top connector. A first lithography step followed by a series of depositions and etching steps patterns a first channel having a bottom conductor. A second lithography step followed by a series of depositions and etching steps patterns a second channel orthogonal to the first channel and having a memory element connecting the an upper conductor and the lower conductor at their overlaid intersections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.