Method for producing a layer arrangement
US7795135B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2006 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Oct 10, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for producing a layer arrangement. An electrically conductive layer is formed and patterned. A sacrificial layer formed on at least part of the patterned electrically conductive layer. An electrically insulating layer is formed on the electrically conductive and sacrificial layers and is patterned in such a manner that one or more surface areas of the sacrificial layer are exposed. The exposed areas of the sacrificial layer are removed to expose one or more surface areas of the patterned electrically conductive layer. The patterned electrically conductive layer is covered with a pattern of electrically conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.