Dynamic timer for testbench interface synchronization
US7797598B1 · kind B1 · utility
8Cited by
5References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 14, 2006 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Jul 15, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3312
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of evaluating a design under test (DUT) can include executing a testbench involving the DUT and, during execution of the testbench, estimating an amount of time needed to perform a first transaction with the device under test according to resolved variables. The method also can include setting a timer with the estimated amount of time needed to perform the first transaction and invoking the first transaction with the device under test. Responsive to expiration of the timer, an indication as to whether the first transaction completed execution can be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.