Verifying design isolation using bitstreams
US7797651B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2007 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Jan 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method of verifying electrical isolation of portions of a circuit design for a programmable integrated circuit (IC) can include translating a circuit design into a circuit design bitstream specifying a plurality of regions, wherein the regions are to be isolated from one another. Routing resources of the programmable IC that are not used by the circuit design can be identified. A fence bitstream can be generated that specifies the unused routing resources. The circuit design bitstream can be compared with the fence bitstream. An indication of whether the plurality of regions of the programmable IC are isolated can be output according to the comparison.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.