Decoupling the number of logical threads from the number of simultaneous physical threads in a processor
US7797683B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2003 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Jul 23, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3854
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods of managing threads provide for supporting a plurality of logical threads with a plurality of simultaneous physical threads in which the number of logical threads may be greater than or less than the number of physical threads. In one approach, each of the plurality of logical threads is maintained in one of a wait state, an active state, a drain state, and a stall state. A state machine and hardware sequencer can be used to transition the logical threads between states based on triggering events and whether or not an interruptible point has been encountered in the logical threads. The logical threads are scheduled on the physical threads to meet, for example, priority, performance or fairness goals. It is also possible to specify the resources that are available to each logical thread in order to meet these and other, goals. In one example, a single logical thread can speculatively use more than one physical thread, pending a selection of which physical thread should be committed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.