Power device with trenches having wider upper portion than lower portion
US7799636B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2009 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Sep 25, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/905
Abstract
A method of forming a semiconductor device includes the following. A masking layer with opening is formed over a silicon layer. The silicon layer is isotropically etched through the masking layer openings so as to remove bowl-shaped portions of the silicon layer, each of which includes a middle portion and outer portions extending directly underneath the masking layer. The outer portions form outer sections of corresponding trenches. Additional portions of the silicon layer are removed through the masking layer openings so as to form a middle section of the trenches which extends deeper into the silicon layer than the outer sections of the trenches. A first doped region of a first conductivity type is formed in an upper portion of the silicon layer. An insulating layer is formed within each trench, and extends directly over a portion of the first doped region adjacent each trench sidewall. Silicon is removed from adjacent each trench until, of the first doped region, only the portions adjacent the trench sidewalls remain. The remaining portions of the first doped region adjacent the trench sidewalls form source regions which are self-aligned to the trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.